.p816
	.include "hwregs.inc"

	.segment "rodata"
	.include "data.inc"

	.segment "code"

	vmem_tiles_offs = 4096

	.macro setreg reg, val
	lda #val
	sta reg
	.endmacro

	.macro fblank onoff
	lda #($0f | (onoff << 7))
	sta REG_INIDISP
	.endmacro

	sei
	clc
	xce

	rep #$10
	.i16
	ldx #$1fff
	txs
	sep #$10
	.i8

	jsr snes_init
	setreg REG_BGMODE, $02	; mode 2, 8x8 tiles
	setreg REG_BG12NBA, $1	; tiles at offs 4kb
	setreg REG_TM, $1	; main screen: BG1

	ldx #0
cmap_loop:
	txa
	lsr
	sta REG_CGADD
	lda logo4bpp_cmap,x
	inx
	sta REG_CGDATA
	lda logo4bpp_cmap,x
	inx
	sta REG_CGDATA
	cpx #32		; 16 entries 2 bytes each
	bne cmap_loop

	pea logo4bpp_tiles_width * logo4bpp_tiles_height / 2
	pea logo4bpp_tiles
	pea vmem_tiles_offs
	jsr copy_vmem
	rep #$20
	.a16
	pla
	pla
	pla
	sep #$20
	.a8

	pea logo4bpp_tilemap_rows * logo4bpp_tilemap_cols * 2
	pea logo4bpp_tilemap
	pea 0
	jsr copy_vmem
	rep #$20
	.a16
	pla
	pla
	pla
	sep #$20
	.a8

	fblank 0

halt:
	jmp halt

	; copy_vmem(vmem_offset, src, num_words)
copy_vmem:
	rep #$30	; 16bit accumulator and index registers
	.a16
	.i16
	phd		; save d
	tsc		; and make it point to the stack
	tcd
	sep #$20	; restore 8bit accum
	.a8
	; stack frame
	; $1 saved D
	; $3 return address
	; $5 vmem_offs
	; $7 src
	; $9 num_words

	lda #$80	; auto incerment after wiriting high byte
	sta REG_VMAINC
	lda $5
	sta REG_VMADDL
	lda $6
	sta REG_VMADDH
	ldy #0
@loop:
	lda ($7),y
	sta REG_VMDATAL
	iny
	lda ($7),y
	sta REG_VMDATAH
	iny
	cpy $9
	bne @loop

	pld
	sep #$10	; back to 8bit index registers
	.i8
	rts


snes_init:
	fblank 1
	stz REG_OBSEL
	stz REG_OAMADDL
	stz REG_OAMADDH
	stz REG_OAMDATA
	stz REG_OAMDATA
	stz REG_BGMODE
	stz REG_MOSAIC
	stz REG_BG1SC
	stz REG_BG2SC
	stz REG_BG3SC
	stz REG_BG4SC
	stz REG_BG12NBA
	stz REG_BG34NBA
	stz REG_BG1HOFFS
	stz REG_BG1HOFFS
	stz REG_BG1VOFFS
	stz REG_BG1VOFFS
	stz REG_BG2HOFFS
	stz REG_BG2HOFFS
	stz REG_BG2VOFFS
	stz REG_BG2VOFFS
	stz REG_BG3HOFFS
	stz REG_BG3HOFFS
	stz REG_BG3VOFFS
	stz REG_BG3VOFFS
	stz REG_BG4HOFFS
	stz REG_BG4HOFFS
	stz REG_BG4VOFFS
	stz REG_BG4VOFFS
	setreg REG_VMAINC, $80
	stz REG_VMADDL
	stz REG_VMADDH
	stz REG_VMDATAL
	stz REG_VMDATAH
	stz REG_M7SEL
	stz REG_M7A
	stz REG_M7A
	stz REG_M7B
	stz REG_M7B
	stz REG_M7C
	stz REG_M7C
	stz REG_M7D
	stz REG_M7D
	stz REG_M7X
	stz REG_M7X
	stz REG_M7Y
	stz REG_M7Y
	stz REG_CGADD
	stz REG_CGDATA
	stz REG_CGDATA
	stz REG_W12SEL
	stz REG_W34SEL
	stz REG_WH0
	stz REG_WH1
	stz REG_WH2
	stz REG_WH3
	stz REG_WBGLOG
	stz REG_WOBJLOG
	stz REG_TM
	stz REG_TS
	stz REG_TMW
	stz REG_TSW
	setreg REG_CGWSEL, $30
	stz REG_CGADSUB
	setreg REG_COLDATA, $e0
	stz REG_SETINI
	stz REG_NMITIMEN
	setreg REG_WRIO, $ff
	stz REG_WRMPYA
	stz REG_WRMPYB
	stz REG_WRDIVL
	stz REG_WRDIVH
	stz REG_WRDIVB
	stz REG_HTIMEL
	stz REG_HTIMEH
	stz REG_VTIMEL
	stz REG_VTIMEH
	stz REG_MDMAEN
	stz REG_HDMAEN
	stz REG_MEMSEL
	rts

	; cartridge header
	.segment "carthdr"
	.byte "TEST                 "
	.byte $20	; fast ROM, LoROM mapping
	.byte 0		; ROM only
	.byte 1		; ROM banks 1 = 32k
	.byte 0		; RAM size
	.byte 2		; country europe/oceania/asia
	.byte 0		; developer id: none
	.byte 0		; ROM version
	.word $ffff	; checksum complement
	.word 0		; checksum
	; 65816 vectors
	.word 0, 0
	.word 0		; cop
	.word 0		; brk
	.word 0		; abort
	.word 0		; NMI (vblank)
	.word 0
	.word 0		; IRQ
	; 6502 vectors
	.word 0, 0
	.word 0		; cop
	.word 0
	.word 0		; abort
	.word 0		; NMI (vblank)
	.word $8000	; reset
	.word 0		; IRQ/BRK


	; vi:ft=asm_ca65: